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TB62726AN/AF
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
TB62726AN,TB62726AF
16-bit Constant-Current LED Driver with Operating Voltage of 3.3-V and 5-V
The TB62726A series are comprised of constant-current drivers designed for LEDs and LED displays. The output current value can be set using an external resistor. As a result, all outputs will have virtually the same current levels. This driver incorporates 16-bit constant-current outputs, a 16-bit shift register, a 16-bit latch and a 16-bit AND-gate circuit. These drivers have been designed using the Bi-CMOS process.
TB62726AN
Features
* * * * * * * * * * * Output current capability and number of outputs: 90 mA x 16 outputs Constant current range: 2 to 90 mA Application output voltage: 0.7 V (output current 2 to 80 mA) 0.4 V (output current 2 to 40 mA) For anode-common LEDs Input signal voltage level: 3.3-V and 5-V CMOS level (Schmitt trigger input) Power supply voltage range VDD = 3.0 to 5.5 V Maximum output terminal voltage: 17 V Serial and parallel data transfer rate: 20 MHz (max, cascade connection) Operating temperature range Topr = -40 to 85C Package: Type AN: SDIP24-P-300-1.78 Type AF: SSOP24-P-300-1.00B Current accuracy (All output ON)
Output Voltage > 0.4 V = > 0.7 V = Current Accuracy Between Bits 4% Between ICs 15% 12% 2 to 5 mA 5 to 80 mA Output Current TB62726AF
Weight SDIP24-P-300-1.78: 1.22 g (Typ.) SSOP24-P-300-1.00B: 0.32 g (Typ.)
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Pin Assignment (top view)
GND SERIAL-IN CLOCK LATCH OUT0 OUT1
OUT2 OUT3 OUT4 OUT5 OUT6 OUT7
VDD R-EXT SERIAL-OUT ENABLE OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8
Warnings: Short-circuiting an output terminal toGND or to the power supply terminal may broken the device. Please take care when wiring the output terminals, the power supply terminal and the GND terminals.
Block Diagram
OUT0
OUT1
OUT15
R-EXT
I-REG
ENABLE
Q ST
LATCH
Q D ST D ST
Q D
SERIAL-IN
D CK
Q
D CK
Q
D CK
Q
SERIAL-OUT
CLOCK
Truth Table
CLOCK
LATCH
ENABLE
SERIAL-IN Dn Dn + 1 Dn + 2 Dn + 3 Dn + 3
OUT0 ... OUT7 ... OUT15
SERIAL-OUT Dn - 15 Dn - 14 Dn - 13 Dn - 13 Dn - 13
H L H X X
L L L L H
Dn ... Dn - 7 ... Dn - 15 No change Dn + 2 ... Dn - 5 ... Dn - 13 Dn + 2 ... Dn - 5 ... Dn - 13 OFF
Note 1:
OUT0 to OUT15 = On when Dn = H; OUT0 to OUT15 = Off when Dn = L. In order to ensure that the level of the power supply voltage is correct, an external resistor must be connected between R-EXT and GND.
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Timing Diagram
n=0 CLOCK 0V 3.3 V/5 V SERIAL-IN 0V 3.3 V/5 V
LATCH
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
3.3 V/5 V
0V
ENABLE
3.3 V/5 V 0V On
OUT0
Off On
OUT1
Off On OUT3 Off
On
OUT15
Off 3.3 V/5 V SERIAL-OUT 0V
Warning: Latch circuit is leveled-latch circuit. Be careful because it is not triggered-latch circuit. Note 2: The latches circuit holds data by pulling the LATCH terminal Low. And, when LATCH terminal is a High level, latch circuit doesn't hold data, and it passes from the input to the output. When ENABLE terminal is a Low level, output terminal OUT0 to OUT15 respond to the data, and on and off does. And, when ENABLE terminal is a High level, it offs with the output terminal regardless of the data.
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Terminal Description
Pin No. 1 2 3 Pin Name GND SERIAL-IN CLOCK GND terminal for control logic Input terminal for serial data for data shift register Input terminal for clock for data shift on rising edge Input terminal for data strobe 4
LATCH
Function
When the LATCH input is driven High, data is not latched. When it is pulled Low, data is latched.
5 to 20
OUT0 to OUT15 Constant-current output terminals
Input terminal for output enable. 21
ENABLE
All outputs ( OUT0 to OUT15 ) are turned off, when the ENABLE terminal is driven High. And are turned on, when the terminal is driven Low.
22 23 24
SERIAL-OUT R-EXT VDD
Output terminal for serial data input on SERIAL-IN terminal Input terminal used to connect an external resistor. This regulated the output current. 3.3-V/5-V supply voltage terminal
Equivalent Circuits for Inputs and Outputs
1. ENABLE terminal
R (UP) VDD
200 k9
2. LATCH terminal
VDD
LATCH
GND GND R (DOWN)
3. CLOCK, SERIAL-IN terminal
VDD
4. SERIAL-OUT terminal
VDD
CLOCK, SERIAL-IN
250 k9
ENABLE
SERIAL-OUT Internal data
GND
GND
5. OUT0 to OUT15 terminals
OUT0 to OUT15 Parasitic Diode GND
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Maximum Ratings (Topr = 25C)
Characteristics Supply voltage Input voltage Output current Output voltage AN-type (when not mounted) Power dissipation AN-type (on PCB) Symbol VDD VIN IOUT VOUT Pd1 Rating 6
-0.2~VDD + 0.2 +90 -0.2 to 17
Unit V V mA/ch V
1.25 1.78 W 0.83 1.00 104 70 C/W 140 120
-40 to 85 -55 to 150
(Note 3) AF-type (when not mounted) AF-type (on PCB) AN-type (when not mounted) Thermal resistance AN-type (on PCB) (Note 3) AF-type (when not mounted) AF-type (on PCB) Operating temperature Storage temperature
Pd2
Rth (j-a) 1
Rth (j-a) 2 Topr Tstg
C C
Note 3: AN-Type: Powers dissipation is derated by 14.28 mW/C if device is mounted on PCB and ambient temperature is above 25C. AF-Type: Powers dissipation is derated by 6.67 mW/C if device is mounted on PCB and ambient temperature is above 25C. With device mounted on glass-epoxy PCB of less than 40% Cu and of dimensions 50 mm 50 mm 1.6 mm.
Recommended Operating Conditions (Topr = -40C to 85C unless otherwise specified)
Characteristics Supply voltage Output voltage Symbol VDD VOUT IOUT Output current IOH IOL VIH Input voltage VIL Clock frequency
LATCH pulse width
Conditions
3/4 3/4
Min 3
3/4
Typ.
3/4
Max 5.5 4 80
-1
Unit V V mA/ch mA
0.7
3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4
Each DC 1 circuit SERIAL-OUT SERIAL-OUT
2
3/4 3/4
1 VDD + 0.15 0.3 VDD 20
3/4 3/4 3/4 3/4 3/4 3/4 3/4
3/4
0.7 VDD
-0.15
V
fCLK twLAT twCLK (Note 4) twENA tSETUP1 tHOLD tSETUP2
Cascade connected
3/4
3/4
MHz ns ns ns ns ns ns
50 25 2000 3000 10
3/4
CLOCK pulse width ENABLE pulse width
Upper IOUT = 20 mA Lower IOUT = 20 mA
Set-up time for CLOCK terminal Hold time for CLOCK terminal Set-up time for LATCH terminal
10 50
Note 4: When the pulse of the Low level is inputted to the ENABLE terminal held in the High level.
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Electrical Characteristics (Topr = 25C, VDD = 3.0 V to 5.5 V unless otherwise specified)
Characteristics Supply voltage Symbol VDD IOUT1 IOUT2 Output current IOUT3 IOUT4
DIOUT1
Conditions Normal operation VOUT = 0.4 V, VDD = 3.3 V VOUT = 0.4 V, VDD = 5 V VOUT = 0.7 V, VDD = 3.3 V VOUT = 0.7 V, VDD = 5 V VOUT > 0.4 V, = All outputs ON VOUT > 0.4 V, = All outputs ON VOUT = 15.0 V
3/4
Min 3.0 31.96
Typ.
3/4
Max 5.5 40.54 40.20
Unit V
36.20 35.90 72.30 71.30
REXT = 490 W 31. 59 63.63 REXT = 250 W 62.75 REXT = 490 W
3/4 1 4
mA 80.97 79.95
Output current error between bits
DIOUT2
%
REXT = 250 W
3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 -1
Output leakage current input voltage
IOZ
1 VDD
mA
Input voltage
VIN
3/4
0.7 VDD GND
3/4 3/4
V 0.3 VDD 0.3 0.3
3/4 3/4 -5
VOL SOUT terminal voltage VOH Output current Supply voltage Regulation Pull-up resistor Pull-down resistor
IOL = 1.0 mA, VDD = 3.3 V IOL = 1.0 mA, VDD = 5 V IOH = - 1.0 mA, VDD = 3.3 V IOH = 1.0 mA, VDD = 5 V When VDD is changed 3 V to 5.5 V
ENABLE terminal LATCH terminal
V
3 4.7
3/4
%/VDD R (Up) R (Down) IDD (OFF) 1 IDD (OFF) 2 IDD (OFF) 3
%
115 REXT = OPEN REXT = 490 W REXT = 250 W REXT = 490 W
3/4
230 0.1 3.5 6 9
3/4
460 0.5 5 9 15 20 25 40
kW
VOUT = 15.0 V VOUT = 15.0 V, All outputs OFF VOUT = 15.0 V, All outputs OFF VOUT = 0.7 V, All outputs ON
1 4
3/4 3/4 3/4 3/4
Supply current IDD (ON) 1
mA
Same as the above, Topr = -40C IDD (ON) 2 VOUT = 0.7 V, All outputs ON REXT = 250 W
18
3/4
Same as the above, Topr = -40C
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Switching Characteristics (Topr = 25C unless otherwise specifed)
Characteristics Symbol tpLH1 Conditions CLK- OUTn , LATCH = "H",
ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H"
Min
3/4
Typ. 150
Max 300
Unit
tpLH2
3/4
140
300
tpLH3 tpLH tpHL1
3/4
140 6 170
300
3/4
Propagation delay
CLK-SERIAL OUT CLK- OUTn , LATCH = "H",
ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H"
3
3/4
ns
340
tpHL2
3/4
170
340
tpHL3 tpLH Output rise time Output fall time Maximum CLOCK rise time Maximum CLOCK fall time tor tof tr tf
3/4
170 7 85 70
3/4 3/4
340
3/4
CLK-SERIAL OUT 10~90% of voltage waveform 90~10% of voltage waveform When not on PCB (Note 5)
4 40 40
3/4 3/4
150 150 5 5
ns ns
ms ms
Conditions: (Refer to test circuit.) Topr = 25C, VDD = VIH = 3.3 V and 5 V, VOUT = 0.7 V, VIL = 0 V, REXT = 490 W, VL = 3.0 V, RL = 60 W, CL = 10.5 pF Note 5: If the device is connected in a cascade and tr/tf for the waveform is large, it may not be possible to achieve the timing required for data transfer. Please consider the timings carefully.
Test Circuit
IDD
VIH, VIL
ENABLE
VDD
RL OUT0 CL
Function generator
CLOCK IOL
LATCH
OUT15
SERIAL-IN SERIAL-OUT R-EXT Logic input waveform GND CL Iref VL
VDD = VIH = 3.3 V VIL = 0 V tr = tf = 10 ns (10% to 90%)
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Timing Waveforms
1. CLOCK, SERIAL-IN, SERIAL-OUT
twCLK CLOCK 50% tSETUP1 SERIAL-IN 50% tHOLD SERIAL-OUT 50% tpLH/tpHL 50% 50%
2. CLOCK, SERIAL-IN, LATCH , ENABLE , OUTn
CLOCK
50%
SERIAL-IN tSETUP2
LATCH
50% twLAT
50% twENA 50% 50%
ENABLE
tSETUP3
OUTn tpHL1/LH1 tpHL2/LH2
50%
tpHL3/LH3
3. OUTn
90% OUTn 10% tof 10% tor ON 90% OFF
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Output Current - Duty (LEDS turn-on rate)
IOUT - DUTY On PCB
100 100
IOUT - DUTY On PCB
80
80
(mA)
60
(mA) IOUT
Topr = 25C
60
IOUT
40
40 Topr = 55C 20
20
VDD = 3.3 V to 5.0 V VCE = 1.0 V Tj = 120C (max)
TB62726AF TB62726AN 0 0
VDD = 3.3 V to 5.0 V VCE = 1.0 V Tj = 120C (max)
TB62726AF TB62726AN
0 0
20
40
60
80
100
20
40
60
80
100
DUTY - Turn On Rate
(%)
DUTY - Turn On Rate
(%)
IOUT - DUTY On PCB
100 2.0 1.8 80 N (On PCB)
Pd - Topr
(W/IC) PD
1.6 1.4 1.2 F (On PCB) 1.0 0.8 0.6 0.4 0.2
(mA)
60
40 Topr = 85C 20 VDD = 3.3 V to 5.0 V VCE = 1.0 V Tj = 120C (max) 0 0 20 40 60 TB62726AF TB62726AN 80 100
Power dissipation
IOUT
0 0
20
40
60
80
100
DUTY - Turn On Rate
(%)
Ambient temperature Ta (C)
Output Current - REXT Resistor
IOUT - REXT
90 80 70 60
(mA) IOUT
50 40 Topr = 25C 30 20 10 0 100 VCE = 0.7 V
500
1000
5000
10000
REXT
(9)
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Application Circuit (example 1): The general composition in static lighting of LED.
> More than VLED (V) = Vf (total max) +0.7 is recommended with the following application circuit with the LED power supply VLED.
r1: The setup resistance for the setup of output current of every IC. r2: The variable resistance for the brightness control of every LED module.
Example) TD62M8600F: 8-bit multi-chip PNP transistor array, which is not used in static lighting system.
VLED
SCAN O0
O1 O13 O14 O15
O2
O0
O1
O2
O13 O14 O15
SERIAL-IN 16-bit SIPO, Latches and Constant-sink-current drivers
C.U. TB62726AN/AF
ENABLE
SERIAL-IN SERIAL-OUT ENABLE
LATCH
16-bit SIPO, Latches and Constant-sink-current drivers
SERIAL-OUT
LATCH
CLOCK
CLOCK
TB62726AN/AF
r1 = 100 W (min) r1 = 100 W (min)
r2
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Application Circuit (example 2): When the condition of VLED is VLED > 17 V
The unnecessary voltage is one effective technique as to making the voltage descend with the zenor diode.
Example) TD62M8600F: 8-bit multi-chip PNP transistor array, which is not used in static lighting system.
VLED > 17 V
SCAN O0
O1 O13 O14 O15
O2
O0
O1
O2
O13 O14 O15
SERIAL-IN 16-bit SIPO, Latches and Constant-sink-current drivers
C.U. TB62726AN/AF
ENABLE
SERIAL-IN SERIAL-OUT ENABLE
LATCH
16-bit SIPO, Latches and Constant-sink-current drivers
SERIAL-OUT
LATCH
CLOCK
CLOCK
TB62726AN/AF
r1 = 100 W (min) r1 = 100 W (min)
r2
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Application Circuit (example 3): When the condition of VLED is Vf +0.7 < VLED < 17 V
VOUT = VLED-Vf = 0.7~1.0 V is the most suitable for VOUT. Surplus VOUT causes an IC fever and the useless consumption electric power. It is the one way of being effective to build in the r3 in this problem. r3 can make a calculation to the formula r3 W = surplus VOUT/IOUT. Though the resistance parts increase, the fixed constant current performance is kept
Example) TD62M8600F: 8-bit multi-chip PNP transistor array, which is not used in static lighting system.
r3
r3
VLED = 15 V
SCAN O0
O1 O13 O14 O15
O2
O0
O1
O2
O13 O14 O15
SERIAL-IN 16-bit SIPO, Latches and Constant-sink-current drivers
SERIAL-IN SERIAL-OUT
LATCH
C.U. TB62726AN/AF
ENABLE
16-bit SIPO, Latches and Constant-sink-current drivers
SERIAL-OUT
LATCH
CLOCK
CLOCK
TB62726AN/AF
r1 = 100 W (min) r1 = 100 W (min)
r2
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Notes
* Operation may become unstable due to the electromagnetic interference caused by the wiring and other phenomena. To counter this, it is recommended that the IC be situated as close as possible to the LED module. If overvoltage is caused by inductance between the LED and the output terminals, both the LED and the terminals may suffer damage as a result. There is only one GND terminal on this device when the inductance in the GND line and the resistor are large, the device may malfunction due to the GND noise when output switchings by the circuit board pattern and wiring. To achieve stable operation, it is necessary to connect a resistor between the REXT terminal and the GND line. Fluctuation in the output waveform is likely to occur when the GND line is unstable or when a capacitor (of more than 50 pF) is used. Therefore, take care when designing the circuit board pattern layout and the wiring from the controller. This application circuit is a reference example and is not guaranteed to work in all conditions. Be sure to check the operation of your circuits. This device does not include protection circuits for overvoltage, overcurrent or overtemperature. If protection is necessary, it must be incorporated into the control circuitry. The device is likely to be destroyed if a short-circuit occurs between either of the power supply pins and any of the output terminals when designing circuits, pay special attention to the positions of the output terminals and the power supply terminals (VDD and VLED), and to the design of the GND line.
*
*
*
*
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Package Dimensions
Weight: 1.22 g (typ.)
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Package Dimensions
Weight: 0.32 g (typ.)
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RESTRICTIONS ON PRODUCT USE
000707EBA
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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